IBM, AMD, Chartered Semiconductor Manufacturing, Freescale, Infineon and Samsung will speed the implementation of a breakthrough material known as “high-k/metal gate” in next generation 32nm computer chips.
The new approach, an industry first based on what engineers call a “high-k gate-first” process, is designed to provide a simpler, less time consuming way for clients to migrate to high-k metal gate technology in order to performance and reduced power consumption. Chips using the new technique will support a range of applications – from low power computer microchips targeted at wireless and other consumer-oriented devices to high performance microprocessors for games and enterprise computing.
This new approach to implementing high-k/metal gate will be available to IBM alliance members and their clients in the second half of 2009.
On January 29, 2007, IBM and its research partners (including Sony and Toshiba) introduced the “high-k/metal gate” innovation as the basis for a long-sought improvement to the transistor. Using the high-k/metal gate material in a critical portion of the transistor that controls its primary on/off switching function enabled the development of 32nm chip circuitry that is designed to be smaller, faster, and more power-efficient than previously thought possible.
Using high-k/metal gate they have been able to shrink the size of a chip by up to 50 percent as compared to the previous technology generation while improving a number of other performance specifications. High-k metal gate chips save about 45 percent total power, an increasingly critical metric in all electronics applications. These improvements will help to increase functionality and performance with lower power consumption and improved battery life in mobile devices.
IBM and its Alliance Partners have developed low-power foundry Complementary Metal Oxide Semiconductor (CMOS) technology using the ‘high-k gate-first’ approach and have demonstrated the first 32nm ultra dense static random access memory (SRAM) in this low power technology with cell sizes below 0.15um2. In addition, they have incorporated the high-k innovation into a new generation of high performance Silicon-On-Insulator (SOI) technology at 32nm. The unique high-k material properties enable a transistor speed improvement of greater than 30 percent over the previous generation of high performance Silicon-On-Insulator (SOI) technology. The SRAM demonstrated in this new generation of high performance technology functions at a lower voltage – an improvement that reduces the energy consumption for microprocessor applications. The use of SOI provides a significant performance and power benefit, which, in combination with the high-k/metal gate advancement, will help the technology deliver energy efficient chips used in applications such as games, personal computers, and high end computing systems.